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Merge branch 'master' into jgrpp

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Remove 'byte' typedef
This commit is contained in:
Jonathan G Rennison
2024-05-07 17:21:50 +01:00
parent f1c0f864f5 6c5a8f55df
commit 18a42664fc
376 changed files with 2220 additions and 2152 deletions
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14
src/elrail.cpp
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@@ -88,7 +88,7 @@ struct DualTrackBits {
* @param override pointer to PCP override, can be nullptr
* @return trackbits of tile if it is electrified
*/
static DualTrackBits GetRailTrackBitsUniversal(TileIndex t, byte *override)
static DualTrackBits GetRailTrackBitsUniversal(TileIndex t, uint8_t *override)
{
DualTrackBits out;
out.primary = TRACK_BIT_NONE;
@@ -326,10 +326,10 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
}
TLG tlg = GetTLG(ti->tile);
byte PCPstatus = 0;
byte OverridePCP = 0;
byte PPPpreferred[DIAGDIR_END];
byte PPPallowed[DIAGDIR_END];
uint8_t PCPstatus = 0;
uint8_t OverridePCP = 0;
uint8_t PPPpreferred[DIAGDIR_END];
uint8_t PPPallowed[DIAGDIR_END];
/* Find which rail bits are present, and select the override points.
* We don't draw a pylon:
@@ -499,7 +499,7 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
if (PPPallowed[i] != 0 && HasBit(PCPstatus, i) && !HasBit(OverridePCP, i) &&
(!IsRailStationTile(ti->tile) || CanStationTileHavePylons(ti->tile))) {
for (Direction k = DIR_BEGIN; k < DIR_END; k++) {
byte temp = PPPorder[i][GetTLG(ti->tile)][k];
uint8_t temp = PPPorder[i][GetTLG(ti->tile)][k];
if (HasBit(PPPallowed[i], temp)) {
uint x = ti->x + x_pcp_offsets[i] + x_ppp_offsets[temp];
@@ -579,7 +579,7 @@ static void DrawRailCatenaryRailway(const TileInfo *ti)
/* Drawing of pylons is finished, now draw the wires */
for (Track t : SetTrackBitIterator(wireconfig[TS_HOME])) {
SpriteID wire_base = get_wire_sprite(t, (t == halftile_track));
byte PCPconfig = HasBit(PCPstatus, PCPpositions[t][0]) +
uint8_t PCPconfig = HasBit(PCPstatus, PCPpositions[t][0]) +
(HasBit(PCPstatus, PCPpositions[t][1]) << 1);
const SortableSpriteStruct *sss;