Merge branch 'progsig-sx' into jgrpp
This commit is contained in:
@@ -355,6 +355,7 @@ public:
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{
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uint64 p1 = 0;
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while(true) {
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if(si == NULL) break;
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switch(si->Opcode()) {
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case PSO_SET_SIGNAL: {
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SB(p1, 0, 3, this->track);
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@@ -365,6 +366,7 @@ public:
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this->RebuildInstructionList();
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si = ((SignalSet*)si)->next;
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} break;
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case PSO_IF: {
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SB(p1, 0, 3, this->track);
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SB(p1, 3, 16, next);
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@@ -393,11 +395,15 @@ public:
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si = ((SignalIf*)si)->after;
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} break;
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case PSO_LAST:
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case PSO_IF_ELSE:
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case PSO_IF_ENDIF:
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return;
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default:
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NOT_REACHED();
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}
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if(si == NULL) break;
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if(si->Opcode() == PSO_LAST) break;
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if(si->Opcode() == PSO_IF_ELSE) break;
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if(si->Opcode() == PSO_IF_ENDIF) break;
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}
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}
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@@ -23,30 +23,30 @@ typedef std::vector<byte> Buffer;
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static void WriteVLI(Buffer &b, uint i)
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{
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uint lsmask = 0x7F;
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uint msmask = ~0x7F;
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while(i & msmask) {
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byte part = (i & lsmask) | 0x80;
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b.push_back(part);
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i >>= 7;
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}
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b.push_back((byte) i);
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uint lsmask = 0x7F;
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uint msmask = ~0x7F;
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while(i & msmask) {
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byte part = (i & lsmask) | 0x80;
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b.push_back(part);
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i >>= 7;
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}
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b.push_back((byte) i);
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}
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static uint ReadVLI()
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{
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uint shift = 0;
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uint val = 0;
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byte b;
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uint shift = 0;
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uint val = 0;
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byte b;
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b = SlReadByte();
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while(b & 0x80) {
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val |= uint(b & 0x7F) << shift;
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shift += 7;
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b = SlReadByte();
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}
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val |= uint(b) << shift;
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return val;
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b = SlReadByte();
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while(b & 0x80) {
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val |= uint(b & 0x7F) << shift;
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shift += 7;
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b = SlReadByte();
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}
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val |= uint(b) << shift;
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return val;
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}
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static void WriteCondition(Buffer &b, SignalCondition *c)
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@@ -59,13 +59,13 @@ static void WriteCondition(Buffer &b, SignalCondition *c)
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WriteVLI(b, vc->comparator);
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WriteVLI(b, vc->value);
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} break;
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case PSC_SIGNAL_STATE: {
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SignalStateCondition *sc = static_cast<SignalStateCondition*>(c);
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WriteVLI(b, sc->sig_tile);
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WriteVLI(b, sc->sig_track);
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} break;
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default:
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break;
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}
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@@ -83,13 +83,13 @@ static SignalCondition *ReadCondition(SignalReference this_sig)
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c->value = ReadVLI();
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return c;
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}
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case PSC_SIGNAL_STATE: {
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TileIndex ti = (TileIndex) ReadVLI();
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Trackdir td = (Trackdir) ReadVLI();
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return new SignalStateCondition(this_sig, ti, td);
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}
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default:
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return new SignalSimpleCondition(code);
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}
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@@ -111,17 +111,16 @@ static void Save_SPRG()
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if(i == e) break;
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}
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}
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// OK, we can now write out our programs
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Buffer b;
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WriteVLI(b, _signal_programs.size());
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for(ProgramList::iterator i = _signal_programs.begin(), e = _signal_programs.end();
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i != e; ++i) {
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SignalReference ref = i->first;
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SignalProgram *prog = i->second;
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prog->DebugPrintProgram();
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WriteVLI(b, prog->tile);
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WriteVLI(b, prog->track);
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WriteVLI(b, prog->instructions.Length());
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@@ -137,44 +136,45 @@ static void Save_SPRG()
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WriteVLI(b, s->next->Id());
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break;
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}
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case PSO_LAST: break;
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case PSO_IF: {
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SignalIf *i = static_cast<SignalIf*>(insn);
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WriteCondition(b, i->condition);
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WriteVLI(b, i->if_true->Id());
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WriteVLI(b, i->if_true->Id());
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WriteVLI(b, i->if_false->Id());
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WriteVLI(b, i->after->Id());
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break;
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}
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case PSO_IF_ELSE:
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case PSO_IF_ENDIF: {
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SignalIf::PseudoInstruction *p = static_cast<SignalIf::PseudoInstruction*>(insn);
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WriteVLI(b, p->block->Id());
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break;
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}
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case PSO_SET_SIGNAL: {
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SignalSet *s = static_cast<SignalSet*>(insn);
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WriteVLI(b, s->next->Id());
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WriteVLI(b, s->to_state ? 1 : 0);
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break;
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}
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default: NOT_REACHED();
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}
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}
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}
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uint size = b.size();
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SlSetLength(size);
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for(uint i = 0; i < size; i++)
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for(uint i = 0; i < size; i++) {
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SlWriteByte(b[i]); // TODO Gotta be a better way
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}
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}
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// We don't know the pointer values that need to be stored in various
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// We don't know the pointer values that need to be stored in various
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// instruction fields at load time, so we need to instead store the IDs and
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// then fix them up once all of the instructions have been loaded.
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//
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@@ -185,7 +185,7 @@ struct Fixup {
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Fixup(SignalInstruction **p, SignalOpcode type)
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: type(type), ptr(p)
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{}
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SignalOpcode type;
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SignalInstruction **ptr;
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};
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@@ -205,9 +205,9 @@ static void DoFixups(FixupList &l, InstructionList &il)
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uint id = reinterpret_cast<size_t>(*i->ptr);
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if(id >= il.Length())
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NOT_REACHED();
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*i->ptr = il[id];
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if(i->type != PSO_INVALID && (*i->ptr)->Opcode() != i->type) {
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DEBUG(sl, 0, "Expected Id %d to be %d, but was in fact %d", id, i->type, (*i->ptr)->Opcode());
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NOT_REACHED();
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@@ -224,10 +224,10 @@ static void Load_SPRG()
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Track track = (Track) ReadVLI();
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uint instructions = ReadVLI();
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SignalReference ref(tile, track);
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SignalProgram *sp = new SignalProgram(tile, track, true);
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_signal_programs[ref] = sp;
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for(uint j = 0; j < instructions; j++) {
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SignalOpcode op = (SignalOpcode) ReadVLI();
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switch(op) {
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@@ -237,24 +237,24 @@ static void Load_SPRG()
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MakeFixup(l, sp->first_instruction->next, ReadVLI());
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break;
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}
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case PSO_LAST: {
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sp->last_instruction = new SignalSpecial(sp, PSO_LAST);
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sp->last_instruction->next = NULL;
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MakeFixup(l, sp->last_instruction->GetPrevHandle(), ReadVLI());
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break;
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}
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case PSO_IF: {
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SignalIf *i = new SignalIf(sp, true);
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MakeFixup(l, i->GetPrevHandle(), ReadVLI());
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i->condition = ReadCondition(ref);
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MakeFixup(l, i->if_true, ReadVLI());
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MakeFixup(l, i->if_false, ReadVLI());
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MakeFixup(l, i->after, ReadVLI());
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MakeFixup(l, i->if_true, ReadVLI());
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MakeFixup(l, i->if_false, ReadVLI());
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MakeFixup(l, i->after, ReadVLI());
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break;
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}
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case PSO_IF_ELSE:
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case PSO_IF_ENDIF: {
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SignalIf::PseudoInstruction *p = new SignalIf::PseudoInstruction(sp, op);
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@@ -262,7 +262,7 @@ static void Load_SPRG()
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MakeFixup(l, p->block, ReadVLI(), PSO_IF);
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break;
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}
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case PSO_SET_SIGNAL: {
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SignalSet *s = new SignalSet(sp);
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MakeFixup(l, s->GetPrevHandle(), ReadVLI());
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@@ -271,11 +271,11 @@ static void Load_SPRG()
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if(s->to_state > SIGNAL_STATE_MAX) NOT_REACHED();
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break;
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}
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default: NOT_REACHED();
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}
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}
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DoFixups(l, sp->instructions);
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sp->DebugPrintProgram();
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}
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