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Add slot and counter support to programmable pre-signals

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This commit is contained in:
Jonathan G Rennison
2020-09-01 18:37:53 +01:00
parent 5c0bf5b9e4
commit abb7b69861
9 changed files with 552 additions and 32 deletions
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34
src/saveload/signal_sl.cpp
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@@ -64,6 +64,21 @@ static void WriteCondition(Buffer &b, SignalCondition *c)
WriteVLI(b, sc->sig_track);
} break;
case PSC_SLOT_OCC:
case PSC_SLOT_OCC_REM: {
SignalSlotCondition *cc = static_cast<SignalSlotCondition*>(c);
WriteVLI(b, cc->slot_id);
WriteVLI(b, cc->comparator);
WriteVLI(b, cc->value);
} break;
case PSC_COUNTER: {
SignalCounterCondition *cc = static_cast<SignalCounterCondition*>(c);
WriteVLI(b, cc->ctr_id);
WriteVLI(b, cc->comparator);
WriteVLI(b, cc->value);
} break;
default:
break;
}
@@ -88,6 +103,25 @@ static SignalCondition *ReadCondition(SignalReference this_sig)
return new SignalStateCondition(this_sig, ti, td);
}
case PSC_SLOT_OCC:
case PSC_SLOT_OCC_REM: {
TraceRestrictSlotID slot_id = (TraceRestrictSlotID) ReadVLI();
SignalSlotCondition *c = new SignalSlotCondition(code, this_sig, slot_id);
c->comparator = (SignalComparator) ReadVLI();
if(c->comparator > SGC_LAST) NOT_REACHED();
c->value = ReadVLI();
return c;
} break;
case PSC_COUNTER: {
TraceRestrictCounterID ctr_id = (TraceRestrictCounterID) ReadVLI();
SignalCounterCondition *c = new SignalCounterCondition(this_sig, ctr_id);
c->comparator = (SignalComparator) ReadVLI();
if(c->comparator > SGC_LAST) NOT_REACHED();
c->value = ReadVLI();
return c;
}
default:
return new SignalSimpleCondition(code);
}