 14ad424470
			
		
	
	14ad424470
	
	
	
		
			
			MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4 E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture. Ref: https://en.wikipedia.org/wiki/Elbrus_2000 Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @sse4 and Dmitry Shcherbakov @crypto-das
		
			
				
	
	
		
			181 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			181 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| /*
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|  * This file is part of OpenTTD.
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|  * OpenTTD is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, version 2.
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|  * OpenTTD is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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|  * See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with OpenTTD. If not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| /** @file cpu.cpp OS/CPU/compiler dependent CPU specific calls. */
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| 
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| #include "stdafx.h"
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| #include "core/bitmath_func.hpp"
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| 
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| #include "safeguards.h"
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| 
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| #undef RDTSC_AVAILABLE
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| 
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| /* rdtsc for MSC_VER, uses simple inline assembly, or _rdtsc
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|  * from external win64.asm because VS2005 does not support inline assembly */
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| #if defined(_MSC_VER) && !defined(RDTSC_AVAILABLE)
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| #include <intrin.h>
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| #include <windows.h>
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| uint64 ottd_rdtsc()
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| {
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| #if defined(_M_ARM)
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| 	return __rdpmccntr64();
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| #elif defined(_M_ARM64)
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| 	return _ReadStatusReg(ARM64_PMCCNTR_EL0);
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| #else
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| 	return __rdtsc();
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| #endif
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| }
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| #define RDTSC_AVAILABLE
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| #endif
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| 
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| /* rdtsc for OS/2. Hopefully this works, who knows */
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| #if defined (__WATCOMC__) && !defined(RDTSC_AVAILABLE)
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| unsigned __int64 ottd_rdtsc();
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| # pragma aux ottd_rdtsc = 0x0F 0x31 value [edx eax] parm nomemory modify exact [edx eax] nomemory;
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| # define RDTSC_AVAILABLE
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| #endif
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| 
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| /* rdtsc for all other *nix-en (hopefully). Use GCC syntax */
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| #if (defined(__i386__) || defined(__x86_64__)) && !defined(RDTSC_AVAILABLE)
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| uint64 ottd_rdtsc()
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| {
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| 	uint32 high, low;
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| 	__asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high));
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| 	return ((uint64)high << 32) | low;
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| }
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| # define RDTSC_AVAILABLE
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| #endif
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| 
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| /* rdtsc for PPC which has this not */
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| #if (defined(__POWERPC__) || defined(__powerpc__)) && !defined(RDTSC_AVAILABLE)
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| uint64 ottd_rdtsc()
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| {
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| 	uint32 high = 0, high2 = 0, low;
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| 	/* PPC does not have rdtsc, so we cheat by reading the two 32-bit time-counters
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| 	 * it has, 'Move From Time Base (Upper)'. Since these are two reads, in the
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| 	 * very unlikely event that the lower part overflows to the upper part while we
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| 	 * read it; we double-check and reread the registers */
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| 	asm volatile (
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| 				  "mftbu %0\n"
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| 				  "mftb %1\n"
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| 				  "mftbu %2\n"
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| 				  "cmpw %3,%4\n"
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| 				  "bne- $-16\n"
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| 				  : "=r" (high), "=r" (low), "=r" (high2)
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| 				  : "0" (high), "2" (high2)
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| 				  );
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| 	return ((uint64)high << 32) | low;
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| }
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| # define RDTSC_AVAILABLE
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| #endif
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| 
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| /* rdtsc for MCST Elbrus 2000 */
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| #if defined(__e2k__) && !defined(RDTSC_AVAILABLE)
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| uint64 ottd_rdtsc()
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| {
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| 	uint64_t dst;
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| # pragma asm_inline
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| 	asm("rrd %%clkr, %0" : "=r" (dst));
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| 	return dst;
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| }
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| # define RDTSC_AVAILABLE
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| #endif
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| 
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| #if defined(__EMSCRIPTEN__) && !defined(RDTSC_AVAILABLE)
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| /* On emscripten doing TIC/TOC would be ill-advised */
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| uint64 ottd_rdtsc() {return 0;}
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| # define RDTSC_AVAILABLE
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| #endif
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| 
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| /* In all other cases we have no support for rdtsc. No major issue,
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|  * you just won't be able to profile your code with TIC()/TOC() */
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| #if !defined(RDTSC_AVAILABLE)
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| #warning "(non-fatal) No support for rdtsc(), you won't be able to profile with TIC/TOC"
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| uint64 ottd_rdtsc() {return 0;}
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| #endif
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| 
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| 
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| /**
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|  * Definitions for CPU detection:
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|  *
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|  * MSVC offers cpu information while gcc only implements in gcc 4.8
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|  * __builtin_cpu_supports and friends
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|  * http://msdn.microsoft.com/library/vstudio/hskdteyh%28v=vs.100%29.aspx
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|  * http://gcc.gnu.org/onlinedocs/gcc/X86-Built-in-Functions.html
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|  *
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|  * Other platforms/architectures don't have CPUID, so zero the info and then
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|  * most (if not all) of the features are set as if they do not exist.
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|  */
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| #if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
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| void ottd_cpuid(int info[4], int type)
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| {
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| 	__cpuid(info, type);
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| }
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| #elif defined(__x86_64__) || defined(__i386)
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| void ottd_cpuid(int info[4], int type)
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| {
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| #if defined(__i386) && defined(__PIC__)
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| 	/* The easy variant would be just cpuid, however... ebx is being used by the GOT (Global Offset Table)
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| 	 * in case of PIC;
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| 	 * clobbering ebx is no alternative: some compiler versions don't like this
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| 	 * and will issue an error message like
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| 	 *   "can't find a register in class 'BREG' while reloading 'asm'"
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| 	 */
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| 	__asm__ __volatile__ (
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| 			"xchgl %%ebx, %1 \n\t"
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| 			"cpuid           \n\t"
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| 			"xchgl %%ebx, %1 \n\t"
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| 			: "=a" (info[0]), "=r" (info[1]), "=c" (info[2]), "=d" (info[3])
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| 			/* It is safe to write "=r" for (info[1]) as in case that PIC is enabled for i386,
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| 			 * the compiler will not choose EBX as target register (but something else).
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| 			 */
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| 			: "a" (type)
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| 	);
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| #else
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| 	__asm__ __volatile__ (
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| 			"cpuid           \n\t"
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| 			: "=a" (info[0]), "=b" (info[1]), "=c" (info[2]), "=d" (info[3])
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| 			: "a" (type)
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| 	);
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| #endif /* i386 PIC */
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| }
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| #elif defined(__e2k__) /* MCST Elbrus 2000*/
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| void ottd_cpuid(int info[4], int type)
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| {
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| 	info[0] = info[1] = info[2] = info[3] = 0;
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| 	if (type == 0) {
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| 		info[0] = 1;
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| 	} else if (type == 1) {
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| #if defined(__SSE4_1__)
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| 		info[2] |= (1<<19); /* HasCPUIDFlag(1, 2, 19) */
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| #endif
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| #if defined(__SSSE3__)
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| 		info[2] |= (1<<9); /* HasCPUIDFlag(1, 2, 9) */
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| #endif
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| #if defined(__SSE2__)
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| 		info[3] |= (1<<26); /* HasCPUIDFlag(1, 3, 26) */
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| #endif
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| 	}
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| }
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| #else
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| void ottd_cpuid(int info[4], int type)
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| {
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| 	info[0] = info[1] = info[2] = info[3] = 0;
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| }
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| #endif
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| 
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| bool HasCPUIDFlag(uint type, uint index, uint bit)
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| {
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| 	int cpu_info[4] = {-1};
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| 	ottd_cpuid(cpu_info, 0);
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| 	uint max_info_type = cpu_info[0];
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| 	if (max_info_type < type) return false;
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| 
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| 	ottd_cpuid(cpu_info, type);
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| 	return HasBit(cpu_info[index], bit);
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| }
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